“Automated Extra Pipeline Analysis of Applications Mapped to Xilinx UltraScale+ FPGAs”
Intl. Conference on Field-Programmable Logic and Applications (FPL), August 2016
Aaron Ng
Xilinx, Inc.
FPGA SW Acceleration + Scale-out
EDA Placement + Physical Synthesis
aaron.ng@xilinx.com
University of MichiganAdvanced Computer Architecture Lab
M.S.E. Computer Science and Engineering
Hardware Systems, Distributed Computing
Advisor: Igor L. Markov
hello@aaron-ng.com
I. Ganusov, H. Fraisse, A. N. Ng, R. T. Possignolo and S. Das,
“Automated Extra Pipeline Analysis of Applications Mapped to Xilinx UltraScale+ FPGAs”
“Automated Extra Pipeline Analysis of Applications Mapped to Xilinx UltraScale+ FPGAs”
J. A. Roy, A. N. Ng, R. Aggarwal, V. Ramachandran, and I. L. Markov,
“Solving Modern Mixed-size Placement Instances”
“Solving Modern Mixed-size Placement Instances”
Integration, the VLSI Journal, vol. 42 no. 2, 2009
Q. Wang, A. N. Ng, R. Aggarwal,
“Resource Mapping of Functional Areas on an Integrated Circuit”
“Resource Mapping of Functional Areas on an Integrated Circuit”
U.S. Patent No. 7,840,919, February 2008
A. N. Ng, R. Aggarwal, V. Ramachandran and I. L. Markov,
“Solving Hard Instances of Floorplacement,”
“Solving Hard Instances of Floorplacement,”
Intl. Symposium on Physical Design (ISPD), April 2006
M. Moffitt, A. N. Ng and I. L. Markov,
“Constraint-driven Floorplan Repair,”
“Constraint-driven Floorplan Repair,”
Design Automation Conference (DAC), July 2006
J. A. Roy, D. A. Papa, A. N. Ng, I. L Markov,
“Satisfying Whitespace Requirements in Top-down Placement,”
“Satisfying Whitespace Requirements in Top-down Placement,”
Intl. Symposium on Physical Design (ISPD), April 2006
J. A. Roy, D. A. Papa, S. N. Adya, H. H. Chan, J. F. Lu, A. N. Ng, and I. L. Markov,
“Capo: Robust and Scalable Open-Source Min-cut Floorplacer,”
“Capo: Robust and Scalable Open-Source Min-cut Floorplacer,”
Intl. Symposium on Physical Design (ISPD), April 2005
A. N. Ng and I. L. Markov,
“Toward Quality Tools and Tool Flows Through High-Performance Computing,”
“Toward Quality Tools and Tool Flows Through High-Performance Computing,”
Intl. Symposium on Quality Electronic Design (ISQED), March 2005
random image:
Mt Tallac rocks, Tahoe