Aaron Ng
Xilinx, Inc.
FPGA Software Acceleration
EDA Placement + Physical Synthesis
University of Michigan
Advanced Computer Architecture Lab
M.S.E. Computer Science and Engineering
Hardware Systems, Distributed Computing
Advisor: Igor L. Markov
R. Lu, Z. Wang, A. N. Ng and S. Das
“Post-routing structural netlist optimization for circuit designs”
U.S. Patent No. 9,646,126, May 2017
I. Ganusov, H. Fraisse, A. N. Ng, R. T. Possignolo and S. Das,
“Automated Extra Pipeline Analysis of Applications Mapped to Xilinx UltraScale+ FPGAs”
Intl. Conference on Field-Programmable Logic and Applications (FPL), August 2016
Q. Wang, A. N. Ng, R. Aggarwal,
“Resource Mapping of Functional Areas on an Integrated Circuit”
U.S. Patent No. 7,840,919, Nov 2010
J. A. Roy, A. N. Ng, R. Aggarwal, V. Ramachandran, and I. L. Markov,
“Solving Modern Mixed-size Placement Instances”
Integration, the VLSI Journal, vol. 42 no. 2, 2009
A. N. Ng, R. Aggarwal, V. Ramachandran and I. L. Markov,
“Solving Hard Instances of Floorplacement,”
Intl. Symposium on Physical Design (ISPD), April 2006
M. Moffitt, A. N. Ng and I. L. Markov,
“Constraint-driven Floorplan Repair,”
Design Automation Conference (DAC), July 2006
J. A. Roy, D. A. Papa, A. N. Ng, I. L Markov,
“Satisfying Whitespace Requirements in Top-down Placement,”
Intl. Symposium on Physical Design (ISPD), April 2006
J. A. Roy, D. A. Papa, S. N. Adya, H. H. Chan, J. F. Lu, A. N. Ng, and I. L. Markov,
“Capo: Robust and Scalable Open-Source Min-cut Floorplacer,”
Intl. Symposium on Physical Design (ISPD), April 2005
A. N. Ng and I. L. Markov,
“Toward Quality Tools and Tool Flows Through High-Performance Computing,”
Intl. Symposium on Quality Electronic Design (ISQED), March 2005
Takoyaki, Osaka